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UID:0551a66c-06ac-4540-ada7-327fb317f720@nexttoyou
DTSTAMP:20261105T160435Z
DTSTART:20261106T213000Z
DTEND:20261106T230000Z
SUMMARY:IEEE SSCS Distinguished Speaker - Truths\, Lies\, and Simulations 
 - A Tutorial on Process Corner Models
DESCRIPTION:ABSTRACT\n\nDevice models play the essential role of bridging 
 technology and design.\n\nYet\, as the late statistician George Box once 
 said\, "all models are wrong\, but some are useful". Given this fundament
 al truth\, this tutorial attempts to demystify the basics of how transist
 or models are constructed\, what they attempt to capture\, and how they a
 re incomplete.\n\nWe will provide a conceptual overview of corner models 
 used in both fixed-corner and Monte Carlo simulations. A deeper understan
 ding of model limitations and simulation methodology can only enable bett
 er design judgment and lead to higher-quality designs.\n\nBIOGRAPHY\n\nAl
 vin Loke just joined Marvell as Senior Distinguished Engineer in the new 
 San Diego design center\, working on analog design/technology co-optimiza
 tion for gate-all-around CMOS. He has previously worked on CMOS nodes spa
 nning 250nm to sub-2nm at Agilent\, AMD\, Qualcomm\, TSMC\, NXP\, and Int
 el Foundry. Alvin received a BASc from the University of British Columbia
 \, and an MS and PhD from Stanford. After several years in CMOS process i
 ntegration\, he has since worked on analog/mixed-signal design\, focusing
  on a variety of wireline links\, including chiplet IOs\, design/model/te
 chnology interface\, and analog design methodologies.\n\nAlvin has been a
 n active IEEE Solid-State Circuits Society (SSCS) volunteer since 2003\, 
 having served as AdCom Member\, CICC Committee Member\, Webinar Chair\, D
 enver and San Diego Chapter Chair\, as well as JSSC\, SSCL\, and Solid-St
 ate Circuits Ma\n\nhttp://next-to-u.app/events/0551a66c-06ac-4540-ada7-32
 7fb317f720
URL:http://next-to-u.app/events/0551a66c-06ac-4540-ada7-327fb317f720
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